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42 PCB007 MAGAZINE I JUNE 2021 construction including area array assembly and thermal transfer. TLPS pastes, which metallurgically bond to circuit pads, offer both high performance and versatility of installation that is conducive to high manufacturing volumes. Because sinter- ing pastes can be formulated with a variety of particle sizes and flow behavior, this technolo- gy can provide a spectrum solution to applica- tions from filled microvias in either a printed circuit board or semiconductor package scale, to printed bumps for interconnection of sub- assemblies, to thermal interfaces with embed- ded heat sinks. is paper will present the two most com- mon implementation flows for the installa- tion of the TLPS paste Z-axis interconnects in mixed mode PCB constructions. Introduction e production of high-layer-count PCBs for the telecommunications, semiconductor test, and high-end computing industries requires an advanced set of fabrication techniques due to the complexity of their design. Frequently, manufacture of these PCBs requires the use of blind and buried vias, high-as- pect-ratio plated through- holes and backdrilling to meet their design specifica- tions. e technical road- map for industries using high-layer-count PCBs in- dicates that future PCB de- signs will be increasing- ly complex and there is a drive toward both higher interconnect density and maintaining signal integri- ty at high frequency. e reliability demands on high layer count boards are also increasing due to the increasing power dis- sipation requirements of telecom, high end computing, and military ap- plications. is increase in thermal exposure over the life span of the PCB exacerbates the need for robust electrical interconnect struc- tures throughout the board beyond just with- stand of assembly operations. With the drive to 0.3 mm pitch components, and the desire to route multiple circuit trac- es between copper pads, fabricators are being pushed to use smaller drill sizes and to plate ever higher aspect ratio holes. e high-as- pect-ratio PTHs in these boards increase the cost of the final board as they are tricky to drill, as well as expensive and difficult to plate con- sistently. One solution to the difficulty of plating the high-aspect-ratio PTH in these PCBs is to break the PCB into subassemblies or "cores" with manageable-sized PTHs. By breaking the PCB into cores of reasonable thickness, the PTHs of these cores can be plated in high qual- ity, yield, and throughput. ese cores may then be interconnected using paste intercon- nects to form a monolithic PCB. Figure 1 is a close-up view of a single TLPS paste intercon- Figure 1: TLPS paste Z-axis interconnect after 6X lead-free reflows.