Issue link: https://iconnect007.uberflip.com/i/1383248
48 PCB007 MAGAZINE I JUNE 2021 ic construction of the PCB and the constituent materials. It is generally most useful to study the issue from the perspective of total cost of ownership through the entire fabrication pro- cess—including yield. Blind and buried vias can increase the interconnect density of complex PCBs by enabling anywhere placement of vias without the need for multiple, semi-additive, se- quential build-up and lamination cycles. As lay- er counts, PTH aspect ratios, and interconnect density requirements increase, yield losses in- crease dramatically in conventionally fabricated PTH PCBs. In high frequency applications, the use of TLPS vias can eliminate the risky back- drilling operation to truncate lossy stubs. Table 1 explores situations in which the use of TLPS paste vias for Z-axis interconnect can provide a potential cost/performance benefit. Implementation of Sintered Paste Interconnections ere are a variety of ways in which sinter- ing paste interconnections can be implement- ed depending on the specific needs of the ap- plication and the associated cost-benefit anal- ysis. Flexibility of design and implementation flow is one of the advantages of paste inter- connect technology. Because the TLPS paste forms sintered interconnects during standard prepreg lamination conditions, the number of subassemblies, the method of application of the TLPS paste, the manufacturing flow, and the specific configuration are all at the discre- tion of the manufacturer. A generalized concept of how the sintered interconnections might be installed is depict- ed in Figure 5. Step 1: Subassembly cores are manufactured using standard PTH manufacturing methods. e number of subassemblies, and the num- ber of layers within each subassembly, is at the discretion of the PCB fabricator/designer. e PTHs are filled and cap-plated to form a land for the TLPS paste interconnects. Generally, following standard industry best practices, an adhesion-promotion treatment is applied to the outer surfaces of the cores to ensure good bonding with the prepreg during lamination of the cores. Step 2: Prepreg and a release sheet, generally PET film, are tack-laminated to one side of the mating pairs of cores. is is the first process that is atypical to standard PCB manufactur- ing, but can be performed using standard PCB fabrication tools such as a lamination press or dry-film laminator. e prepreg may consist of one or more layers depending on the thickness of the copper on the surface. Figure 5: Generic installation process for TLPS pastes Z-axis interconnects.