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54 DESIGN007 MAGAZINE I APRIL 2022 Measuring PCB insertion loss can be time consuming (when compared with impedance testing), and the probes and cables tend to be significantly more costly (and delicate) than those used for characteristic impedance mea- surement. Nonetheless, given the high capital investment required for test systems, cables, and probes—and the design of the test vehicles themselves—wouldn't it be nice if you could have a way of looking at your expected results before you put a test probe to a PCB? I am not talking about simply simulating the result, rather recreating the raw files that can be used to drive the insertion loss test soware and feeding the test soware with data "as if " it was idealised measurement data. Wouldn't it be handy if you could prepare simulated raw files "as if " from a VNA to feed into your de-embedding soware to ensure that it processes and the results from the test soware are what you expect? If you have followed this column for some time, you will recall the advice on measure- ment I have shared before, courtesy of Eric Bogatin: "To make a good RF measurement, you need some engineering intuition to get a gut feel for what the measurement should be, and you also should model the expected results with a field solver before making the measurement itself." My column proposes an extra step made pos- sible using Touchstone files. Touchstone files are an industry standard ASCII file used across the EDA community for the recording and sharing of network param- eter data, such as s-parameters (and more). Using Touchstone Files to Build Measurement Confidence The Pulse by Martyn Gaudion, POLAR INSTRUMENTS

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