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56 DESIGN007 MAGAZINE I APRIL 2022 ey are the common output of vector net- work analysers, and of simulation tools. Origi- nated by EEs in 1984, the file format has lived through a variety of owners and is now under the umbrella of Keysight Technologies. e files themselves have become a de-facto indus- try standard with their simplicity and lack of variation leading to very widespread usage. Most fabricators are familiar with impedance measurement and can possibly make imped- ance measurements with their hands behind their back and their eyes closed. For insertion loss measurements, the list of who can do that is arguably much smaller. One of the reasons is the process of modeling and measurement is inherently more complex, even with atten- dant soware to help, so a non-SI specialist in the fab industry needs all the confidence tools available to have trust in a measurement. Let's look at the process difference from modeled to measured. First for impedance: 1. Model expected Zo result by entering trace geometry and base material characteristics with a field solver. 2. Create suitable test vehicle, typically a four- to six-inch coupon with via connec- tion at each end. e via characteristics are not super critical. 3. Test the coupon trace with a suitable TDR or impedance test system. 4. Compare 1 with 3. Provided you made what you thought you made, you will have a reasonable chance of good correlation. Now to the process for insertion loss. e principle is the same but because of the much higher (and lower) frequency content there are some extra steps which can lead to disap- pointment if you don't plan. 1. Model the expected insertion loss by entering trace geometry, coupon length, and add in loss tangent and appropriate surface roughness to the characteristics. 2. Create a suitable test vehicle, typically a pair of differential traces with identical cross-section but one pair shorter than the other; five-inch and 10-inch traces are not uncommon. Most ultra-high-speed architectures are differential, so a pair of differential traces is required. e vias and landing pads need to be specifically designed to an OEM specification or to the advice of the probe manufacturer you choose. Via design is much more critical than with impedance. 3. Measure the s-parameters of the two traces over the desired frequency band. 4. Post process the s-parameter pair data. Most methods require the test data to be processed by mathematically removing any residual via effects by looking at the difference between the long and short line. is is a complex process: One algorithm for this is Delta-L 4.0, but many other methods exist. 5. e post processing soware will give you the dB loss per unit length of the trace under test which you can compare with my first point. What Could Go Wrong? Quite a lot actually. e VNA operator needs to ensure that the VNA is calibrated to the par- ticular cable setup (and possibly the probe as well). ough Delta-L 4.0 does a pretty good job of removing probe effects, there is still a multi-step process to initially calibrate the VNA before measurement starts with a given setup. e probes deployed are precision RF measurement probes, and either need plac- ing with a probe station, or need to have the coupon design tooled with location holes to ensure the operator is not at risk of misalign- ing. Also, the differential probes need to be connected to both ends of the short line and gather one set of s-parameters and both ends of the long line. Contrast this with a differen- tial impedance measurement which requires a precalibrated TDR and one differential probe. ere are far fewer steps.