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12 DESIGN007 MAGAZINE I AUGUST 2023 where enhanced learning capability makes them unique to solve any complex/nonlinear problem. IC design has also benefited from ML techniques at different design levels, from device modeling to test of manufactured chips. IC layout is a very labor-intensive task that typically requires iteration. e performance of an IC depends on where things sit relative to each other. e distances between objects, the wire length, capacitance, and the induc- tance of the interconnects are also important. Aer the initial layout, the simulated values of variables are back-annotated to the design. is first layout may not be perfect, so further iterations are required. Reducing the number of iterations and, hence, the design cycle time by using AI, can be extremely cost-effective. Much of the same methodology happens with PCB layout: We do a pre-layout simula- tion to determine the constraints, a post-lay- out simulation to verify the layout, and then the results are back-annotated. is process can also take many iterations. Earlier this year, Cadence announced the release of the Allegro X AI cloud technology. Cadence states that it dramatically reduces design turnaround time (10X) by a u t o - m a t i n g p l a c e - m e n t , power plane generation, and criti- cal net routing. Cadence has been developing place and route (P&R) tools for IC synthesis for decades and has now adapted the technol- ogy for PCB P&R. Shorter inter- connects and reduced crossovers are essen- tial for both chip and PCB layout but critical routing incor porating signal integr ity and flight time requirements is of greater impor- tance for the PCB. Unfortunately, most EDA vendors do not have the same resources to pour into R&D as the Big Tech companies. Such financial backing, coupled with creative engineering, reduces time-to-market. So, EDA tools will inevitably take much longer to develop. en, most EDA companies are primarily interested in doing R&D that increases sales in the next cycle, not long term. Currently, EDA tools use algorithms to con- trol auto-placement and routing. is is a set of instructions that a computer program follows to accomplish a task. PCB routers have gone through many different stages of development over the years, from third-party applications that were difficult to learn, use, and interface, to a cohesive, cloud-based, layout/router envi- ronment. IC and PCB routing applications have used many of the same algorithms over time, including: • Lee's Algorithm (maze routing) • Dijkstra's Algorithm (shortest path) • Grid-based routing • Rip-up and reroute • Shape-based, push-and-shove • Steiner Tree (rectilinear routing) • Heuristic (topology) routing It is not so much the algorithms that differ, but rather the environment that dictates which algorithm is most effective. With the advent of AI, machine learning applies artificial intel- ligence that provides sys- tems with the abil- ity to automatically learn and improve from experience with- out being explicitly programmed. is is sort of like how proficient PCB design- ers know how to best tackle a com- plex task: Experience is the best teacher of all. ese algorithms are procedures that are implemented in code and run-on data. Machine learning models are output by algo- rithms and are comprised of model data and a prediction algorithm. Machine learning algo- rithms provide a type of automatic program- ming where machine learning models repre- EDA tools will inevitably take much longer to develop.