PCB007 Magazine

PCB007-Sep2023

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98 PCB007 MAGAZINE I SEPTEMBER 2023 is information is lost when testing finished boards. Figure 6 illustrates the significance of geographical defects. Currently available test systems will report errors in a panel as though it were a single fin- ished board. A few setup parameters used by the SPCF computer allow it to indicate which image is failing, and it translates all errors back to the first image. A single image overlay (or roadmap) can then be used for troubleshoot- ing. Error correlation displays indicate what images each error was seen in. Note: Each image in a multiple image fixture must be wired in the same connector-pin sequence. is has always been the normal wiring method used by SPCF fixture vendors. SPCF System Overview An overview of the current SPCF system may be helpful to those engaged in bare board test development, as stand-alone test systems having a number of the following capabilities will not be available in the near future. e PCB test systems are located at SPCF, Building 71, in Sunnyvale, California. Each of the five test systems has an adjacent HP2621P terminal as an operator console. e test sys- tems and terminals are linked to the electrical test HP1000 computer (one of five in SPCF). A test operator uses these terminals to initiate the test procedure by entering a workorder num- ber (and possibly a part number if the boards have not been tested before). e integral printer will document any defects as they occur, and these printouts can be attached to each printed circuit panel to allow the review of possible repair of the defect. Figure 7 shows a system diagram of the electrical testing and AOI. e SPCF system described above has a number of major functions: 1. Translate test errors into various formats (absolute, x-y, etc.). 2. Correlate and store errors-by-run and run-to-run. 3. Download and save test programs to and from the test systems. 4. Store fixture and PCB descriptions. 5. Store run results by part number, workorder number, vendor, revision, and inner layer side number for a period of one year. 6. Generate various reports by time limit, part number, workorder, and vendor, detailing production information, worst offenders, graphical trends, etc. Benefits e major benefit of this new approach is that it focuses on preventing errors in the first place. It identifies systematic defects so their sources can be tracked down, it nearly elimi- nates phantom errors, and it provides infor- mation on random errors that can be used for process control. SPCF believes that the new system eventually will help them to achieve a zero-defect rate in electrical continuity for all boards made at SPCF. So far, the most significant improvement has been seen in newly designed, complex multilayered boards. Systematic defects in these boards have been cut by nearly 30% since the system was fully implemented. More subtle systematic defects will be found as historical data accumulates and the more frequent defects are eliminated. Another major area of benefit is vendor feedback. Some of the panels tested by SPCF Figure 6: Geographically significant defects on a PCB panel.

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