Issue link: https://iconnect007.uberflip.com/i/1526407
50 DESIGN007 MAGAZINE I SEPTEMBER 2024 Oen, our primary goal is to maximize prod- uct functionality without increasing product size. Developing a multifunction silicon-based semiconductor (system-on-chip) for a specific product application, however, requires a sig- nificant investment in both engineering and financial resources. e problem is that many of the newer generations of semiconductor die have actually increased in size, with higher I/O and terminal pitch variations that have become significantly smaller. A key goal for developers is to increase bandwidth, reduce power, mini- mize package profile, and control fabrication costs. e next goal is to develop a packaging technique that is not disruptive and, ideally, Heterogeneous Integration and High-density SiP Technologies can utilize the existing manufacturing infra- structure. Note: According to a survey from the Inter- national Business Strategy Corporation, the increase of design cost for each generation technology has exceeded 50% aer imple- menting the 22 nm process. is includes the cost of EDA, design verification, IP core, tape- out, and testing. e total design cost of 7 nm process is expected to reach about $300 million and moving to the next level 3 nm process, the semiconductor cost may increase five times, up to $1.5 billion. Because of the technical limita- tions in yield (such as the mask size of lithogra- phy machine), the existing monolithic integra- Designer's Notebook Feature Column by Vern Solberg, CONSULTANT