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Design007-Oct2024

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36 DESIGN007 MAGAZINE I OCTOBER 2024 and signals were placed on the inner layers. Figure 1 4 shows the new power-signal routing architecture, which was called power mesh to differentiate it from IMPS. Electrical Model e original Lynx board was not controlled impedance, but additional PCB designs that used power mesh were. e consensus is that power mesh is an offset coplanar stripline. Figure 9 shows the cross-section and stack-up for the PMA. e crosstalk model indicates that the power mesh architecture creates a naturally low cross- talk condition. Each signal trace of X-width is approximately 3X or 4X distance from the next signal, depending on the power trace width. is creates horizontal crosstalk of less than 2%. e vertical crosstalk is extremely low. From 15 mV/V for thin cores (0.012") to 2.6 mV/V for a thick core (0.051"). Wiring Model In 1994, StorageTek, an OEM in Colorado, conducted performance benchmarking with microvia designs and fabrication. e successes of that program contributed to its continued use of microvias. In 1998, it became apparent that they required some wiring model to indi- cate that a microvia structure was required. In performing that model development, a power mesh benchmark was designed for one of the microvia boards. Figure 5 in Tech Talk #28 shows the two inner layers of the four-layer power mesh structure and two of the six inner layers from the original eight-layer through- hole design. e wiring density model for the power mesh architecture is: Power mesh = 17 to 40 signal inches per square inch per layer* • Calculate the statistical wiring density using Coors, Anderson & Seward 4 • Calculate the Manhattan wiring density using Wd = 0.0068(X)^2 – 0.1644(X) + 35.1, where X is the Coors statistical wiring density • Calculate the routability index for power mesh • Calculate the layout efficiency using L.E. (%) = 4.0642(RI)^ – 1.189, where RI is the routability index * Dependent on trace width and spacings Summary e new microvia topologies of swing vias, VeCS, IMPS, and power mesh have demon- strated that applications to simplifying complex multilayer, PBGAs, and MCMs to UHDI are available. VeCS can reduce process costs; IMPS can reduce the structure to a two-metal inter- connect, while power mesh uses a four-layer, reinforced laminate structure. ese results show that these topologies have the capacity of positively impacting how electronic products are packaged and interconnected. DESIGN007 References 1. Chapter 3: Swing Vias, The HDI Handbook, by Happy Holden, I-Connect007. 2. Happy's Tech Talk #1: Vertical Conductive Structures (VeCS), by Happy Holden, PCB007 Mag- azine, October. 2021. 3. I have written nine articles on VeCS for PBC007 Magazine. 4. Happy's TechTalk #27: Integrated Mesh Power System (IMPS) for PCBs, by Happy Holden, PCB007 Magazine, March 2024. 5. Happy's Tech Talk #28: The Power Mesh Archi- tecture for PCBs, by Happy Holden, PCB007 Maga- zine, April 2024. Happy Holden has worked in printed circuit technology since 1970 with Hewlett-Packard, NanYa Westwood, Merix, Foxconn and Gentex. He is cur- rently a contributing technical editor with I-Connect007, and the author of Automation and Advanced Proce- dures in PCB Fabrication, and 24 Essential Skills for Engineers. To read past columns, click here.

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