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32 PCB007 MAGAZINE I MAY 2025 ey did so by using an etch test pattern that duplicated or exceeded their toughest product because the first genuine opportunity to eval- uate your product's progress is aer etching and stripping the etch resist. ey could then see each step's varying process param- eters, how they would affect the final etched product, determine the best process parameters for each process, and how tightly they must be con- trolled. Once those param- eters were determined, they would then produce a written procedure for each process. By optimiz- ing each process step and fol- lowing the written procedures, the whole etching process is sta- bilized, and a lot of random defects are eliminated. It then becomes much eas- ier to isolate systemic defects for each process, then figure out what is causing those defects and what needs to be done to eliminate them. Many of those first-rate shops then added a data logger to their systems that records the operating process parameters over time so that any process anomalies that might cause an increase in defects or drop in yields can be eas- ily located and corrected. Some shops built on this by using statistical process control (SPC) data that allows their processes to "talk" to them. It allowed them to evaluate and control short-term trends by analyzing the variations in the overall system as they occur. Yes, it takes time and effort, but until you have tight con- trol of your process, it is difficult to systemati- cally track down and eliminate defects. How- ever, for many small- and medium-sized inde- pendent PCB manufacturers, data loggers and sophisticated statistical control soware may be beyond their capabilities and budgets. Regardless, process understanding, improve- ment, and documentation remain worthwhile. A simple example from my own experience can demonstrate what can be accomplished. When I started working in 1974, we did not have a cleanroom or a sophisticated exposure unit for dry film etch resist exposure. We had a DuPont PC120 non-collimated exposure unit in a room with yellow lights. (It sufficed until the late 1980s when we used a new etch test pattern with 3 mil (75 µm) lines and spaces.) ere were 352 test modules on each side of a 24x18 test panel. Initially, our yields on these test modules were in the 80% range. e failures were mostly opens. When we inspected them under a microscope, we discovered that most of the opens were tiny breaks in the 3 mil lines— difficult to find even under mag- nification. Suspicion immediately fell on dust particles in the yellow room, which were being deposited on the panels during exposure, so we developed a procedure involv- ing phototool inspection and cleaning, along with exposure glass cleaning before each expo- sure session. We dusted with lint-free microfi- ber cloths and anti-static brushes before plac- ing the phototool on the exposure glass and the panel on the phototool. is brought the yields up to greater than 95%. While it wasn't perfect, it was good enough for our purposes. We wrote down those procedures, and they are still in use today. For a brief period, we had access to a Class 10,000 cleanroom with a state-of-the-art expo- sure unit courtesy of our then-corporate own- ers. Without the written procedures, the yields on our test panels prepared in the clean- room were still around 95%. Reinstatement of those procedures increased yields to greater than 99%. One overriding question was why the cleanroom yields were only around 95% without the exposure preparation steps. ey should have been better. Access to the cleanroom was supposed to be limited to only a few trained people, and they