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32 SMT007 MAGAZINE I OCTOBER 2026 F E AT U R E A RT I C L E BY T H U Y N G U Y E N , H O N GW E N Z H A N G, P H D, RO N A L D C. L AS KY, P H D, A N D A DA M M U R L I N G, I N D I U M C O R P O R AT I O N Solder joint voiding remains a critical reli- ability concern in electronic packaging, particu- larly for high-performance and safety-critical appli- cations such as automotive electronics. Excessive voiding can adversely affect both thermal conduc- tivity and mechanical strength, leading to elevated junction temperatures, accelerated fatigue failure under thermal cycling, and ultimately reduce product lifetime. To address these concerns, industry standards such as IPC-7095 provide general acceptance criteria for voiding in ball grid array (BGA) pack- ages. For bottom-terminated components (BTCs), including quad flat-pack no-leads (QFNs), IPC-A- 610, and J-STD-001 are typically applied. The DKE automotive addendum from the IPC-A-610H and J-STD-001H further harmonizes evaluation methods by establishing consistent definitions and stan- dardized procedures for void area measurement, enabling comparability of results across laborato- ries and studies. Multiple factors contribute to void formation during the surface mount assembly process, including stencil thickness, reflow profile, and solder paste formulation. In this study, solder joint voiding was evaluated in accordance with the DKE automotive Optimizing Mixed Alloy Solder Pastes for Low Voiding and High PCB Reliability Editor's note: This is a condensed version of a paper originally presented at SMTA International in October 2025. Download the full paper from I-Connect007.com.