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30 SMT Magazine • June 2014 ADvAnCeD THeRMAL MAnAgeMenT SOLuTIOnS continues feaTure 18. The meaning of the solder defect due to the dimple formation in the galvanic process mechanical reliability will be investigated in further studies. However, thermal simulation proved that they are insignificant for the ther- mal resistance. Also optimization of via geom- etry and placement will be conducted, as well as the influence of copper thickness of the top layer that contributes the most to initial heat spreading of the chip's power loss. Summary Several different concepts for thermal man- agement solutions on printed circuit boards for high-power applications were shown in this paper. Benefits of state-of-the-art concepts, like insulated metal substrates and open or plugged thermal vias, were illustrated by comparing the thermal performance of high-power LED mod- ules built-up with different concepts. In partic- ular, the plugged thermal vias and the insulated metal substrates, which allow technologists to realize short heat conduction paths, turned out t o b e interesting thermal management solutions. Beside these well-established variants, some new concepts have also been presented. Cav- ity boards (boards with local depth reduction) show thermal advantages due to a reduced thermal path along the Z-axis through the board. Thermal simulations of cavity boards at- tached with high-power light emitting devices show excellent cooling performance. In com- parison with the simulation results of state of the art concepts, the cavity board approach shows by far the lowest thermal resistance of the board system and guarantees therefore also the lowest junction temperature for the at- tached high-power component. The realization of test vehicles of these concepts is planned, to verify the simulation data by thermal measure- ments on these test boards. Furthermore, also the thermal advantages of copper-filled thermal vias in chip carrier boards have been presented. First results of thermal simulations have been shown and dis- cussed. Further simulations and measurements on test vehicles are going on, and the results of these thermal investigations are also planned to be published in the near future. Acknowledgement The authors gratefully acknowledge the financial support from the "Neue Energien 2020" program, project number 827784, of figure 18: Chip carrier with dimple inside via.