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PCBD-July2014

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July 2014 • The PCB Design Magazine 37 CONCURRENT DESIgN continues the design, or—as commonly occurs—wait for the fab shop's report. ICD has responded to this challenge by re- cently developing a bi-directional interface from the ICD Stackup Planner to Altium De- signer 14. This new interface allows the design- er to exact the rigid/flex stackup from the Alti- um Layer Stack Manager into the Stackup Plan- ner. High-speed materials (up to 40GHz) can be merged from the Dielectrics Materials Library, of over 8,800 materials, and the impedance of multiple differential pairs can be simulated on the same substrate. Once finalized, the design- er simply exports the data, including PTH and blind and buried microvia spans, trace width and clearances and differential pair rules back into Altium Designer. This allows the designer to route to impedance. A fabrication drawing of the stackup specifying all HDI requirements is also exported to Excel. (Thus ends my shame- less plug. But it does work well.) Similarly, PDN analysis is often overlooked completely. I can't stress enough how impor- tant low AC impedance is for high-speed de- signs that demand high-current drain at low core voltages. If the impedance is high at either the fundamental frequency or any of the odd harmonics, then higher levels of electromag- netic radiation can be expected. This has a di- rect impact on product reliability and the abil- ity to pass EMC. For years, application notes have recom- mended the use of three decoupling capaci- tors per power pin. This generally consisted of a 100nF, 10nF and a 47pF capacitor. The idea behind this was that different values provided current at different frequencies, but unfortu- nately not the right frequencies, as all boards are different. As can be seen in Figure 3, mul- tiple capacitors per decade are required to keep the effective impedance, of the PDN, below the target up to the required bandwidth. If too few capacitors are used, spread widely across the frequency domain, then there is a good chance that anti-resonance peaks in the PDN will exac- erbate the problem. Also, in this case, I have incorporated the use of 3M Embedded Capacitance Material (ECM) which is the only practical way to pull the PDN low around the GHz region. This ma- beyond design Figure 2: integration of the iCD stackup Planner and Altium Designer 14.

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