Design007 Magazine


Issue link:

Contents of this Issue


Page 37 of 79

38 The PCB Design Magazine • December 2015 A high-speed digital power distribution net- work (PDN) must provide a low inductance, low impedance path between all ICs on the PCB that need to communicate. In order to reduce the inductance, we must also minimize the loop area enclosed by the current flow. Obvi- ously, the most practical way to achieve this is to use power and ground planes in a multilayer stackup. In this two-part column, I will look at the alternatives to planes, why planes are used for high-speed design and the best combination for your application. Back in the mid-eighties, when I worked at the University of Western Australia, one of my duties was to fix the departmental mainframe: the dreaded DEC PDP-11/40. When it broke down, it was a two-week sentence to solitary confinement in the frigid computer room. This monster machine had card after card with rows of TTL logic chips. Figure 1 illustrates a typical Unibus board. It had 8K, 16-bit word core mem- ory, which I believe could be expanded to 80K if the need ever arose. The core had a 400ns ac- cess time, which means the system clock would have been a blazing 2.5MHz. I always used the "divide and conquer" meth- odology. First, eliminate the power supplies then start dividing the system in half, then half again until the fault was localized within a small cir- cuit. But, as it took about half an hour to reboot, with a specific sequence of octal latches, it was a very time consuming process. Plus, there were always numerous engineering students banging on the window, to the terminal room, enquiring when the "mother" might be fixed so they could complete their assignments. The boards were double-sided and used a power finger, type A or B layout configuration on the top side of the board, as shown in Figure 2. The bottom side could then be used entirely column by Barry olney IN-CIRCuIT DeSIGN PTy lTD AuSTRAlIA BEYoND DESIGN Plane Crazy, Part 1 Figure 1: unibus board (courtesy of DeC). Figure 2: Power finger configuration.

Articles in this issue

Archives of this issue

view archives of Design007 Magazine - PCBD-Dec2015