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70 The PCB Design Magazine • December 2015 via fields and to craft transparent inter-layer via transitions have become expected capabilities of PCB design software. Automotive Ethernet standards allow for up to 15 meters of cable. At gigabit data rates, twisted-pair cables experience significant at- tenuation due to high-frequency metal loss. Advanced equalization techniques, such as feed forward equalization (FFE) or continuous time linear equalization (CTLE), are applied to com- pensate. FFE and CTLE are complex DSP algo- rithms implemented with large and complex transceiver ICs. For PCB system simulations, these algorithms can be addressed with the al- gorithmic modeling interface (AMI) extension to the IBIS (I/O Buffer Information Sheet) stan- dard. IBIS-AMI models are now readily available from chipset vendors and commonly applied to serial-link simulation of computing and tele- com designs. IBIS-AMI models are expected to quickly become equally commonplace for auto- motive Ethernet transceiver ICs. Serial links require compliance to a specific BER. For 1000BASE-T1, this value is 1.0e-10, or one error for every 10 billion bits received. Because it is impractical to directly simulate tens of billions bits of data with traditional cir- cuit simulation, high-capacity simulation ap- proaches are applied to simulate hundreds of thousands or even millions of bits to generate ELECTRICAL DESIGN CHALLENGES FoR AUToMoTIVE PCBS Figure 4: PAM3 simulation. article

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