Issue link: https://iconnect007.uberflip.com/i/652863
52 The PCB Design Magazine • March 2016 voltage slew rate across the capacitor approximately corresponds to a band- width which matches the 100 or 120 Hz measure- ment frequency used by component vendors to test their parts. Figure 7 shows the simulation deck, Fig- ure 8 shows the result. The current waveform in Figure 8 shows sharp spikes at the beginning and the end of the ramp. We can ignore those spikes, since they are the result of the ideal piece-wise-linear voltage ramp with sharp corners at those time instances. For the duration of the voltage ramp, the current shows a voltage dependence that is very similar to that which we see in Figure 6. In fact from the current vs. time function of Figure 8 we can Figure 6: Capacitance of the GRM219R60G476ME44 part at 100 Hz and different DC bias levels. Figure 8: Time-domain simulation results with the simulation deck shown in Figure 7. The blue trace with its axis on the left is the voltage ramp across the capacitor. The black trace with its axis on the right is the resulting current through the capacitor. Figure 7: Time-domain simula- tion deck to measure the volt- age-dependent capacitance with a voltage ramp swinging from 0V to 4V. dynamic models for passiVe components