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62 DESIGN007 MAGAZINE I JUNE 2018 stitching vias shall be placed near signal vias to electrically connect the reference planes on different PCB layers. DESIGN007 References 1. Tan, S., Yew, Y. and Shi, H. (2008), Cross- talk and Switching Noise Mechanism Study in High-Density Wire-bond FPGA Devices, 10th Electronics Packaging Technology Conference, Singapore, pp. 78-83 2. Barry Olney's Beyond Design column (April 2017), Return Path Discontinuities Chang Fei Yee is a hardware engineer with Keysight Technologies. His responsibilities include embedded system hardware development, and signal and power integrity analysis. stitching via connecting the reference planes. This sole stitching via becomes the return path bottleneck of the two signal traces and results in more critical crosstalk for the return current versus test case 1. On the other hand, in test case 3, the signal trace on the top layer is referenced to ground, but the signal trace on the bottom layer is ref- erenced to power, or vice versa, contributing to the broken or non-continuous return path after signal layer transition, thus intensifying the signal reflection and crosstalk. Conclusion It is crucial to provide a continuous return path for high-speed signaling during layer tran- sition on PCB to minimize signal reflection and crosstalk. This is achievable by assigning each signal segment's reference plane to the same net (i.e., preferably ground). Additionally, Figure 6: Noise induced at far end point for 3 test cases due to crosstalk.