Issue link: https://iconnect007.uberflip.com/i/1359517
APRIL 2021 I DESIGN007 MAGAZINE 21 from each byte lane is enough because they're all routed much the same. Pick the worst-case signals to simulate then the rest will be fine. When you're routing the data group of sig- nals, it should all be done on the one layer of the substrate. A lot of reference designs that I have seen have address lines and data lines routed on the outer microstrip layer and some on the inner stripline layers. As I mentioned before, that all impacts timing, because of the different velocity of propagation of the outer and inner layers. If you run the entire bus on one layer, then you're matching the timing automatically, so that saves a lot of simulation time and risk. Crosstalk is very difficult to predict. When I do a teardown of the board, I look at every layer with respect to every other layer. I'll have a look at layer one, which may be a signal layer with respect to the layer two, which may be a ground, and look for any signals outside that ground plane, because once the signal leaves the plane area that increases its impedance, and it will radiate and cause problems. When you get to stripline, you may have dual asymmetric stripline, and you will have two traces between the planes. You need to look at the planes with reference to each signal layer and see where the return paths will flow. We tend to route signals from one point to another from a driver to a receiver, but what you must understand is the return current will flow with high frequency directly underneath that signal trace, and if there's a split in the plane, or it has to change layers in some way, then you need to facilitate that. If you have two ground reference planes, for instance, you can place a ground stitching via where the layer transition is. However, if the reference plane changes from ground to power, traditionally we use one decap across the planes to provide a return path for the current. If you have two different power sup- plies—for instance, a 5V and a 3V—and you have traces going across the split, you should put in a decoupling capacitor going from the 5V to ground and then from the 3V to ground. is stops the noise coupling between the two different power supplies that are going through ground rather than just from supply to supply. ere are a lot of things to look at about overlapping your signals. Broadside coupling is very, very difficult to spot because when we are routing we generally turn off the other lay- ers or just dim them in the background. We are just looking at the one layer we are rout- ing and pushing things around, and we don't understand or see what's on the other signal layer near it. In the stripline situation where you have broadside coupling, you have the width of the trace coupling to the width of the trace below, which is a lot more coupling area than you would have with an edge coupling because you only have the very thin edge of the trace with edge coupling. With broadside coupling, you have a wide trace coupling to another wide trace, and generally you've got a very thin dielectric—like a 3-mil—in between. at makes a beautiful coupling, maybe a good RF coupling, but it's not what you want to do in digital design. Also, be careful of broadside coupling on built-up microstrip layers. Shaughnessy: It sounds like a lot of this comes down to following solid design and engineer- ing practices, but also having the experience to know what to look for. You can't be a part- timer with simulation tools, I guess. Olney: It's all about experience. Experience is the greatest teacher of all! at's why I say you can't just put a tool in front of an EE who's just out of college. ey don't know what to do—it doesn't make sense to them. ey don't under- stand the principles or concepts, and someone needs to give them direction in how to analyze high-speed designs quickly and efficiently. Shaughnessy: is has been really great. anks for speaking with us. Olney: ank you. DESIGN007