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76 PCB007 MAGAZINE I OCTOBER 2019 Conclusion By varying the design parameters—such as vertical trace width, antipad, and vertical trace to reference—we can change the imped- ance and match it with the impedance of the horizontal traces, creating a non-reflective and lower loss transition. We have not addressed all parameters in this short article, but we will do that in the following issues by adding actual measurement data. In the meantime, more products are built in various programs to determine reliability and match measurements with the simula- tion models. In Figure 15, a section of a deep VeCS-2 slot demonstrates its capability. This is part of the HDPUG program. Acknowledgements Thanks to Yuriy Shlepnev of Simberean for the simulation work. I also want to thank the WUS PCB China R&D team for all the great development work performed on VeCS. PCB007 Joan Tourné is CEO of NextGIn Technology BV. Figure 15: A section of a deep VecS-2 slot. Andy Shaughnessy and Brenda Clunie, Vice President of Opera- tions for EPTAC, discuss the com- pany's current growth plans and how its training facilities have ex- panded across the US and Canada to serve the needs of OEMs who are bringing in new, younger tal- ent. The turnover in tribal knowl- edge is driving young people to catch up and become empowered. Clunie said that they are con- tinuously adding instructors and training partners to bring training as near to the customers as they can. RTW SMTAI 2019: EPTAC Continues Its Expansion Click on the image to watch the interview.

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