Design007 Magazine

Design007-Sept2020

Issue link: https://iconnect007.uberflip.com/i/1285883

Contents of this Issue

Navigation

Page 37 of 129

38 DESIGN007 MAGAZINE I SEPTEMBER 2020 Secondly, note that even though the via di- mensions remain constant, the temperature is remaining (nearly) constant over the entire current range from 2.7 to 8.4 amps. That is be- cause the parent trace is acting as a heat sink. Without the effects of the parent trace, the via would likely melt at 8.4 amps in approximately one second [8] . Finally, and most importantly, note that the current density (green curves) is varying wide- ly, both along the trace and through the via, as we change simulations. Yet the via temperature is remaining constant, and the trace tempera- ture is only varying over a narrow range. This shows that current density is not related to via temperature. This shows that current density is not related to via temperature. (Note: Repeat- ing this sentence is not a mistake.) Conclusion If you are designing boards, stop making trace and via decisions based on current density. DESIGN007 Notes 1. IPC-2152, "Standard for Deter- mining Current-Carrying Capaci- ty in Printed Board Design," August 2009, IPC., ipc.org. 2. Brooks, Douglas G., Ph.D., and Dr. Johannes Adam, PCB Trace and Via Current and Temperatures: The Complete Analysis, 2 nd Edition, 2017. 3. TRM (Thermal Risk Manage- ment) was created by Dr. Johannes Adam, president of Adam Research (adam-research.com). TRM was originally conceived and designed to analyze temperatures across a circuit board, taking into consider- ation the complete trace layout with optional Joule heating as well as various components and their own contributions to heat generation. 4. See Note 2, Chapter 7. 5. Prototron Circuits of Tucson, Arizona, contributed several test boards for our research efforts. 6. Via simulations place about a 100x greater demand on the computer CPU and memory than do trace simula- tions. This is because via simulations require much great- er thermal resolution (due to the small width (thickness) of the via wall). Therefore, from a practical standpoint, via simulations usually are done with smaller dimensions than are trace simulations. 7. Recall one of the surprising outcomes of the IPC-2152 investigation was that internal traces are cooler than ex- ternal ones, all other things equal. 8. We discuss fusing times and conditions in Note 2, Chapters 10 and 11. Douglas Brooks, Ph.D., is the founder of UltraCAD Design and co-author of PCB Trace and Via Currents and Temperatures: The Complete Analysis. Table 3: Summary of the constant-temperature via simulation. Figure 4: Constant-temperature via simulation.

Articles in this issue

Archives of this issue

view archives of Design007 Magazine - Design007-Sept2020