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38 PCB007 MAGAZINE I JANUARY 2023 ments. e funding will allow the U.S. to accel- erate the development of innovative packag- ing technologies that will support new revo- lutionary and evolutionary end products. e Department of Commerce is currently work- ing on the details of the NAPMP implementa- tion plan, with more details expected in early 2023. Delivering on the goals set by the CHIPS Act requires development in a wide variety of technical domains and the integration of these diverse building blocks. e processing com- ponents can be separated into three general functional areas: wafer-, panel-, and unit-level processing. Wafer processing steps, which follow the manufacturing flow of building and intercon- necting the transistors on a die, involves elec- trically connecting multiple die. ese die can be side by side and connected through a polymer/metallization structure, or they can be stacked on top of each other with connec- tions composed of solder or copper. A multi- tude of architectures have been developed by the industry, each optimized for the final prod- uct performance and cost targets. ese wafer- based processing steps take advantage of the tools and extensive experience of the wafer fabrication industry. Panel-based processing steps support a variety of use cases, from building substrates (packages) where one die is attached, to being an alternate approach for interconnect- ing multiple die in the same unit through dif- ferent process flows. Based on package body size, die count, and total die area, panel-based processing can offer a lower-cost alternative to wafer-based processing. Panel-based pro- cessing benefits from higher panel utilization for larger package sizes relative to wafers and a higher number of units per panel. Like the economies of scale the semiconductor indus- try achieved in the transition from 200 mm to 300 mm wafers, panel processing achieves equivalent benefit over wafer processing. In addition, advances in panel-based technolo- gies and materials enable unique solutions for a variety of market segments such as commu- nications and computation. However, there are challenges that need to be overcome to proliferate panel-based pro- cessing. For example, the materials, process equipment, and facilities to build advanced substrates is becoming closer to wafer fab equipment, and so equipment development is needed. e smaller geometries of panel- based processing require clean environments, advanced lithography, and higher performance dielectrics, among other materials. Panel han- dling needs to improve to increase line yield. ese capabilities can be applied to other industries such as display and board manufac- turing, which further incentivizes scaling these technologies to the level required to overcome the unique defect, quality, and reliability chal- lenges facing the panel testing industry. Pack- aging provisions from the CHIPS Act may accelerate these efforts. Unit-based processing can be viewed as the continued evolution of what is commonly referred to as assembly and test. is manufac- turing stage also requires technical advances to support higher thermal loads and tighter pitches. Many products require processing using all three advanced flows—wafer, panel, and unit. For example, the Intel® Data Center GPU Max Series product has approximately 100 billion transistors in a 47 tiles/die package. ese Delivering on the goals set by the CHIPS Act requires development in a wide variety of technical domains and the integration of these diverse building blocks.