Issue link: https://iconnect007.uberflip.com/i/1514628
72 PCB007 MAGAZINE I JANUARY 2024 Article by Steve Schow, Bob Gosliak, Thomas McCarthy AGC MULTI MATERIAL AMERICA Editor's note: is paper was originally pre- sented at IPC APEX EXPO 2023. is excerpt will include the sections on hole fill, planarity, and heavy copper resin considerations. All table and figure numbers om the original paper are preserved in this excerpt. 2. Via Fill Buried via Figure 10 shows a typical buried via design and the associated defects caused by CTE material mismatch. ese structures are becoming increasingly common with today's more complex struc- tures. e hole-fill process is also becom- ing more common as BGA packages become tighter. As package sizes increase, requiring more routing layers, these structures adopt combinations of both blind and buried vias. Due to the increased layers and reduced PTH (plated through-hole) vias, designers are forced to use smaller drill sizes to keep the aspect ratio within fabrication capability. is drives the need for thinner cores. e resulting problem is thin subs are more prone to stretch- ing during planarization. e initial trials investigated a simple four- layer design containing a PTFE core requir- ing hole-fill. e fabricator struggled with this New Resin Systems Used to Solve Circuit Board Fabrication Issues Figure 10: Buried and blind via structures and associated defects. (Courtesy: PWB Interconnect)