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PCB007-Jan2024

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74 PCB007 MAGAZINE I JANUARY 2024 design due to the stretching of the subassem- bly aer planarization. e construction was a 10-mil subassembly bonded to a 30-mil subas- sembly with 5000 x 14 mil vias. e trial was to evaluate simultaneously bonding the two sub- assemblies and filling all the vias during the lamination process. Figure 11 shows the flow and fill of the sub- assemblies using FR-4 as a low-cost test vehi- cle (no plated through-hole plating). e initial test with FR-4 dummies was to optimize the amount of prepreg needed between the sub- assemblies to simultaneously bond the subas- semblies together and via fill. e typical pro- cess of bonding two subassemblies together involves building the subassemblies and filling them with a via fill material prior to lamina- tion. Epoxy via filling leaves small bumps over the surface of the subassembly. ese bumps need to be planarized to yield a flat planar cop- per surface with the via fill only being present in the through-holes. Planarization is an abra- sive mechanical process that involves sand- ing off the surface. So or non-reinforced cop- per-clad subassemblies are prone to mechan- ically induced irregular stretching. in 5- and 10-mil subassemblies would be far more prone to mechanical distortion than a 20- or 30-mil subassembly. e issue is layer-to-layer registration of many subassemblies bonded together where any individual subassembly with unwanted dimensional movement could cause a misregistration problem. It is preferred to planarize a much thicker subassembly that is more resistant to any mechanical distor- tion. By simultaneously bonding the subas- semblies together that are not planarized and via filling simultaneously, the fabricator has the advantage that the newly-built subassembly, based on two individual subassemblies, is a lot thicker and less prone to distortion during the planarization process. In this example, instead of planarizing the 10- and 30-mil subassemblies individually, the resulting thicker 40-mil subassembly can be planarized with lower risk. Cost, time, and process steps are saved. In Figure 11, the thin prepreg layer consisted of two plys of prepreg which was sufficient to fill all the volume of the mode suppression via holes and still leave roughly a 4-mil dielectric spacing between the subassemblies. Figure 12 shows the same design with the exception that the FR-4 based subassembly was replaced with the desired high frequency material, a ceramic filled PTFE based fiberglass copper-clad laminate. e trial was successful and achieved 100% hole-fill for all 5,000 vias. Figure 13 shows a similar exam- ple where the bonding ply material can be used both as a bondply and via hole-fill material. Figure 13: A fully buried via with 100% via fill using the bond ply materials to via fill and bond the assembly together (via size 0.0045", via drilled 0.008", 0.0028" deep hole, 13K holes 6"x11" panel). Figure 12: The same design as described in Figure 11 with the exception that fiberglass- reinforced, ceramic filled, PTFE copper-clad laminates were used to create the subassemblies. Figure 11: The top 10-mil subassembly was bonded together to the bottom 30-mil subassembly while simultaneously via filling the thousands of through- holes in the individual subassemblies.

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