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FEBRUARY 2024 I PCB007 MAGAZINE 91 culation of the Manhattan Predicted Intercon- nect Density, δ. Predicted Interconnected Density, δ D = ave. interconnect distance (in.) δ = D * Ni ÷ A (inch. per sq. inch) where: N i= total number of interconnections (Ni = 2*Nt/3) Nt = number of terminal leads A = rout area (sq. inch) D = E(x) * G where: E(x) = expectation of occurrence G = pad placement grid (in.) where: α = empirically derived constant = 0.94 A = lnα S = M + N T = M = board width of grid pts. = (width/G) + 1 N = board length of grid pts. = (length/G) + 1 Substrate Capacity Substrate capacity is the wiring length avail- able to connect all the components. It is com- posed of three factors: 1. Design rules: e traces, spaces and via lands, keepouts, etc., that make up the geometries of the substrate. 2. Structure: e number of signal layers and the combination of through and buried vias that permit interconnection between layers and the complex blind, stacked, and variable depth vias available in HDI technologies. Figure 2: a) Interconnect length histogram for the PWB in Figure 3a; b) Probability distribution of trace length. 1 Figure 3: a) Multilayer example from Coor's paper; b) Interconnect length histogram for PWB 3a and 2a. 1