Issue link: https://iconnect007.uberflip.com/i/1539283
16 DESIGN007 MAGAZINE I SEPTEMBER 2025 The blueprint for strategic stackup planning: 1. Define performance requirements. Outline the single-ended and the differential pair require- ments based on the technology used. 2. Choose dielectric materials wisely. Use mate- rials with consistent Dk over the bandwidth. Choose a low-Dk and low-Df material for low loss between signal layers. Conversely, use a high-Dk and low-Df material between the closely coupled power planes to increase inter-plane capacitance. 3. Build the layer order intentionally. Top/bottom for components and routing fanout. Use copla- nar waveguides on the outer layers for RF and SERDES design. Make adjacent layers reference planes (for clean return paths) and have internal signal layers nested between closely coupled planes to gain stripline advantages. 4. Determine series and/or parallel terminations to match the impedance and dampen reflections. The Via Vandal He's the chaotic saboteur who punches holes through return paths and loves messing with impedance. He creates stubs, disrupts signal flow, and throws your reference planes into disarray. He injects a propagating wave into the cavity, which can excite the cavity resonances. Other signal vias, also passing through this cavity, can pick up this transient voltage as crosstalk, and when the wave meets the PCB edge, the two reference planes form a slot antenna that will radiate noise with the potential to generate electromagnetic interference (EMI) to nearby equipment. The more switching signals that pass through the cavity, the more noise is induced into other signals. He affects vias all over the cavity. Treating the plane pair as a radial transmission line and terminating it in its characteristic impedance can suppress reflections and standing waves. A region under a large BGA densely populated with vias also appears as a discontinuity because of the large array of antipads eating a hole in the plane. A discontinuity reflects propagating energy because it represents a mismatch with the char- acteristic impedance of the transmission line. To open up planes under BGAs, use via-in-pad, shrink B E YO N D D ES I G N the antipad diameter, and use teardrops to offset antipads. Dangling via stubs can distort signals passing through an interconnect and also decrease the usable bandwidth of the signal. Vias can add jitter and reduce eye openings (Figure 1), which can cause data to be misinterpreted by the receiver. Length is the primary factor that influences the induc- tance of the via, which depends on the design complexity, the number of layers, and hence the overall PCB thickness. To neutralize the Via Vandal, you have two tactical options: back-drill the plating (Figure 2) to remove the residual stub, or—far more effective— route the signal through the full length of the via barrel, leaving no stub or minimal stub to exploit. By eliminating unused segments, you shut down his favorite hiding spot and keep reflections at bay. ▼ F i g u re 1 : T h ro u g h v i a s i g n a l (to p) a n d st u b o n v i a ( b ot to m ) .