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Design007-Oct2025

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14 DESIGN007 MAGAZINE I OCTOBER 2025 B E YO N D D ES I G N by B arr y O lney, In-C ircuit D esign PT Y LTD / Australia The Fundamental Structure of Spectral Integrity F i g u re 1 : Ty p i c a l p owe r d i st r i b u t i o n n et wo r k to p o l o g y. ▼ Impedance can be characterized in both the time and frequency domains. In the time domain, it influ- ences how electromagnetic energy propagates through interconnects, affecting signal integrity and waveform fidelity. In the frequency domain, AC impedance determines how well the network can suppress noise and deliver clean power at a range of frequencies. AC impedance shapes how power rails respond to transient loads. Impedance becomes a filter; high impedance at certain fre- quencies can cause resonances, while low imped- ance can suppress noise. Maintaining AC imped- ance within acceptable limits across the entire bandwidth is essential to minimize unwanted radi- ation and ensure compliance with electromagnetic compatibility standards. Traditionally, there was a belief that placing a few decoupling capacitors near each IC power pin was sufficient to stabilize voltage at the device, an approach that proved effective at lower frequen- cies. In the time domain, these capacitors act as local energy reservoirs, delivering charge to the load during transient events until the power supply can respond. However, in the frequency domain, decoupling capacitors distributed strategically across the power distribution network (PDN) serve a complementary role by reducing impedance across a range of frequencies, helping the PDN meet its AC impedance objectives. Thus, decoupling capac- itors fulfill two distinct yet interdependent func- tions—one temporal, one spectral—that together ensure robust power integrity. The typical PDN topology (Figure 1) consists of numerous connections from the voltage regula- tor module (VRM), through capacitors, vias, to wide traces and copper pours, power and ground planes to the solder balls and interconnects on the IC sili- con itself. The PDN must provide a constant supply voltage, within a tolerance of 5%, at the power pins of each IC. This voltage must be stable from DC up to the maximum bandwidth, which is typically five times the fundamental frequency. At the same time, these connections not only deliver power but also provide the return signal path.

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