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MARCH 2026 I I-CONNECT007 MAGAZINE 103 low-resistance and high-resistance states to store data. The blue arrows labeled "2F" represent the electrical field applied to change the resistance of the material, which enables the storage of information. The key advantage (for PCB designers) is that ReRAM drops onto a PCB with the same ease and familiarity as a traditional memory device. Although the underlying device physics are radically differ- ent, the board-level packaging and design rules remain comfortably conventional. For PCB design- ers, that means no exotic constraints, no unusual stackups, and no new routing paradigms to learn— just straightforward, well-understood bus routing with clean point-to-point tuned connections. In practice, ReRAM behaves like a modern, drop-in memory component that fits naturally into existing design flows, making integration fast, predictable, and refreshingly uncomplicated. Although double data rate (DDR) operation has not yet been demonstrated in ReRAM, there is no fundamental barrier to adopting the protocol. In principle, the switching dynamics, interface timing, and bus architecture are fully compatible with DDR signaling, suggesting that future device generations could incorporate DDR support as the technology matures, effectively enabling a DDR- ReRAM implementation. As the technology transitions into mass pro- duction, a notable milestone was achieved in December 2025 when Weebit Nano formalized a licensing agreement with Texas Instruments for its resistive ReRAM technology. ReRAM is built on fab- friendly materials and integrates seamlessly into existing semiconductor flows, making it an attrac- tive option for deployment within TI's advanced process nodes for embedded processing devices. The agreement encompasses intellectual prop- erty licensing, comprehensive technology transfer, and the design, integration, and qualification of Weebit's ReRAM within TI's established manufac- turing technologies. With this collaboration now underway, we should expect to see early indica- tions of ReRAM-enabled devices emerging in the market in the near future. Notably, this develop- ment coincides with a period in which DRAM pric- es have increased by roughly 170% over the past year, creating a profound impact across consumer and enterprise hardware segments. Key Points • Random-access memory (RAM) can be clas- sified as either volatile or non-volatile. DRAM, SRAM, and flash store data as electrical charge. • ReRAM stores data by modulating the elec- trical resistance of a thin metal-oxide layer sandwiched between two electrodes. • ReRAM operates by forming and dissolv- ing nanoscale conductive paths within the dielectric material. • The application of an electrical field leads to the formation of conductive filaments through the insulator layer. • The two stable resistance states represent binary data and remain intact even when power is removed. • Switching resistance states happens ex- tremely fast, giving ReRAM the potential to outperform NAND flash and even approach DRAM-like speeds. • ReRAM writes at very low voltages, requires no stand-by power and is ideal for mobile, IoT, and battery-sensitive systems. It also re- tains memory when the power is removed. • ReRAM drops onto a PCB with the same ease and familiarity as a traditional memory device. I-CONNECT007 Resources Nano Werk: Resistive, Random-Access Memory (ReRAM): Principles, Materials, and Applications Barry Olney is managing director of In-Circuit Design Pty Ltd (iCD), Australia, a PCB design service bureau that specializes in board-level simulation. The company developed the iCD Design Integrity software incorporating the iCD Stackup, PDN, and CPW Planner. The software can be downloaded at www.icd.com.au. To read past columns, click here. B E YO N D D ES I G N