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MARCH 2026 I I-CONNECT007 MAGAZINE 99 Then, the opposing metal terminal surfaces (Cu-Cu bond) interconnects are formed through a batch annealing sequence at 150ºC to 300ºC. During the annealing process, the Cu-Cu connections over- come the recess resulting from the CTE mismatch between the metal and the oxide, as illustrated in Figure 5. 1. Align die to terminal pattern on wafer and place die onto wafer surface. 2. After die placement, there is a spontaneous bond between oxide layers. 3. Cu-Cu interconnect forms at elevated tem- perature (without external pressure). Interdiffusion of the Cu pads requires time at temperature to complete the metallurgical bond. Since the initial oxide bonding also takes place at room temperature, Cu oxidation during bonding is minimized. The post-process example furnished in Figure 6 illustrates the two joined opposing ter- minals. I-CONNECT007 Vern Solberg is an indepen- dent technical consultant, specializing in SMT and microelectronics de- sign and manufacturing technology. To read past columns, click here. D ES I G N E R 'S N OT E B O O K Figure 5: DBI Cu-Cu oxide bond joining process sequence. Figure 6: Post-process view of DBI Cu-to-Cu joined terminals. (Source: Adeia Corp.) Note: Adeia has demonstrated D2W hybrid bonding at a 10-μm pitch with electrical test yield up to 92%. It has also demonstrated a process for cleaning and activat- ing die mounts onto dicing tape in a dicing frame. Pick-and-place will then take place directly from the dicing frame at a dem- onstrated throughput of 1,636 die per hour with a single head bonder. The DBI technology can achieve one million intercon- nects per mm 2 vertically at a pitch of 1 μm. Read Vern's book, Design Guidelines for Surface Mount and Microelectronic Technology