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118 I-CONNECT007 MAGAZINE I AUGUST 2026 Figure 9: The micro-VeCS process as follows: a) laser cutting the cavity; b) plating the cavity; c) apply positive electrodeposited resist; d) direct expose the resist; e) etch and strip; f) fill VeCS slot. cycles (Figure 8a). Extensive IST testing has revealed that VeCS coupons achieved 10 to 30 cycles while conven- tional PTH had a range of seven to 10 cycles (Figure 8b). Additional data is available from NextGln. Future Enhancements The current focus is on the use of HDI microvias to enable VeCS applications for fine pitches down to 0.15 mm. The micro-VeCS process is shown in Fig- ure 9 for inner layers. VeCS/HDI will scale down the feature sizes for VeCS to enable it to run smaller devices pitches– device pitches down to 0.15mm are possible, as seen in Figure 10. The benefits of VeCS/HDI are: • No materials limitations. Use flat weave materials to support the laser processing • Compete with HDI constructions and take advantage of reduced lamination cycles reducing lead time and complexity • Single lamination process versus 5 or more laminations • Reduce cost by 40–60% • Higher yields H A P P H A P P Y ' ' S T E S T E C H T C H TA L K A L K