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56 I-CONNECT007 MAGAZINE I AUGUST 2026 F E AT U R E A RT I C L E Whether some fabricators find it controversial or problematic, Pete's original 2017 interview with Joan holds up, and it is incumbent upon technology journalists to keep the spotlight on innovation with the hope for more discussion. Whether, ultimately, VeCS is more widely adopted, other innovative so- lutions to our high density challenges may be dis- covered as a result of this discourse. What Does VeCS Offer PCB Fabrication? A fundamental challenge when building very high density PCBs is the difficulty in reliably plating vias that are beyond a 1:1 aspect ratio. In his work, Joan partnered with Wus to experiment with various ob- long slot dimensions that tested the throw of the plating chemistry, as a supplement to the traditional round hole/via shape, which inherently has shorter plating throw capacity. 2 Importantly, VeCS does not require different Almost 10 years ago, Pete Starkey interviewed Joan Tourné, inventor and CEO of his new com- pany, NextGin Technology. 1 Joan's resume included many years as a director at Mommers Print Service in the Netherlands, and then as advanced technol- ogy and business director with Viasystems Group. He had just secured his IP for a vertical conductive structure (VeCS), a novel means of creating high density vertical interconnections for semiconduc- tors and complex, high layer count PCBs. This month, we re-examine VeCS technology, a method for HDI PCB fabrication with large back- plane-type boards developed in partnership with Wus, which uses the technology in its factories. VeCS has not gained much traction in other areas or among smaller shops, and as domestic U.S. and European fabricators struggle with whether and how they will meet next-gen density requirements, having all options on the table seems prudent. The Relevance of VeCS as an HDI Process Option BY M A RCY L A RO N T, I - C O N N ECT 0 07 Figure 1: Slot dimensions used to conduct initial "throw" testing. 2