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74 I-CONNECT007 MAGAZINE I AUGUST 2026 Editor's note: Vertical conductive structures (VeCS) is a PCB fabrication approach developed by Joan Tourné, CEO of NextGin Technology. By replacing many of the sequential-build processes associated with stacked microvias, VeCS offers PCB fabricators a potentially simpler manufac- turing approach to HDIs. The technology can reduce or eliminate multiple lamination cycles, ease some stackup constraints, and achieve greater vertical interconnect density while lever- aging conventional PCB fabrication equipment and processes. Yet, in some circles, VeCS is controversial. More than five years ago, we took a hard look at VeCS, but in our industry, that is a long time. Every layer interconnect (ELIC) is experiencing broader adop- tion in HDI builds, but it also carries significant processing and reliability challenges. In this article, Tourné re-examines VeCS, explaining the how and why, and expanding on its pros and cons. Packaging Trends Driving PCB and Substrate Technology Packaging technology has always driven the PCB, but today's AI and high-performance computing devices are accelerating that relationship. As com- pute density, bandwidth, and power requirements increase, package, substrate, and PCB design be- come more interdependent. Modern AI processors, such as NVIDIA's Black- well architecture, require thousands of package connections, support multiple stacks of high-band- width memory (HBM), and can dissipate as much as 1,000 watts of power or more. These demands are driving new approaches to package substrates, redistribution layers (RDLs), thermal management, and PCB fabrication, where manufacturing itself is becoming a limiting factor. As bandwidth increases and tolerances tighten, maintaining acceptable production yields with conventional PCB processes becomes more difficult. Testing every high-speed F E AT U R E A RT I C L E BY J OA N TO U R N É , N E XTG I N T EC H N O LO GY VeCS HDI Process Technology Has the Time Come for Broader Adoption?