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110 I-CONNECT007 MAGAZINE I AUGUST 2026 exchange for normal plating baths. The new alternative drill/router bits have successfully created channels of 0.1 mm with straight walls and no burring. Figure 3 shows various blind channel depths plated with conven- tional plating equipment. Figure 4 shows plating results with respect to the slot length and slot depth. Note that for these tests, NextGin used plating processes at standard parameters and chemistry types. The method of plating was electroless copper followed by a panel plate to the required copper thickness in the slot targeting a thick- ness of 25 µm. Fabrication Process Figure 5 presents the views of the VeCS fab process, starting with a con- ventional through-hole multilayer. The process has eight steps: 1. Create slot 2. Plate slot 3. Alignment in BGA pin field 4. Resin fill PR slot and PR stencil 5. Drill CR slots 6. If vertical traces are going to be used, drill BR slots 7. BR/CR stencil 8. Resin fill BR/CR slot In Step 1, after drilled vias are completed, the primary cross-rout (CR) slots are put in. Here, a special drill/router bit uniquely suited for this operation is used. Much work and experimentation were conducted to perfect an ideal drill/router bit for this task. Then in Step 2, metalliza- Figure 3: Creating and plating the blind channel (slot) is the key feature of VeCS-2 but is within the capability of any high-performance PCB fabricator. 3 Figure 4: Plating thickness as a function of slot depth and length. 3 H A P PY'S T EC H TA L K