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90 I-CONNECT007 MAGAZINE I JUNE 2026 rules for ultra-high-speed stackups: 1. Thin dielectrics (2–3 mil). Thin dielectrics con- fine the fields and raise the cutoff frequency. 2. Ultra-low loss materials. The waveguide re- duces radiation and crosstalk, but dielectric loss still matters. 3. HDI-only via structures. Through-vias excite higher-order modes. Skip-vias and microvias do not. 4. Minimize transitions. Skip-layer routing reduc- es the number of via transitions dramatically. 5. Field containment is mandatory. Skip-layer routing is literally a field containment structure. 6. Crosstalk must be engineered. The via fence becomes the crosstalk control mechanism. Suitable Dielectrics for 224G For 224G PAM4, only ultra-low-loss dielectrics with Df = 0.002 and tightly controlled Dk (3.2–3.4) are suitable. These materials use E-glass spread fiber to reduce skew and must support 56 GHz Nyquist bandwidth while minimizing loss, skew, and higher- order mode excitation. Stackups Where Skip-layer Is Mandatory 1. 112G short-reach hybrid stackup. A short- reach hybrid stackup is a mixed-performance PCB structure designed to support 112G PAM4 on selected layers while keeping overall fabrication cost and layer count under control. It blends: º One or two ultra-low-loss stripline layers for the SerDes lanes º Standard low-loss or mid-loss materials (e.g., Isola 370HR) for the rest of the board º HDI microvias and skip-vias for clean BGA escape º Conventional through-vias for slower sig- nals and power distribution A 112G short-reach hybrid stackup (chip-to-chip) is shown in Figure 3. It uses blind skip-vias from layers 1 to 3 to give a clean escape from the fine-pitch BGA, with the 112G lanes routed on layer 3 using Megtron 7, while medium-speed digital signals run on layer 5 in 370HR to reduce cost. The iCD Stackup Planner is set to HDI sequential-build mode to exclude resin flow. The 224G long-reach ultra-low-loss stackup (back- planes, etc.) in Figure 4 supports dual 224G waveguide layers on L3 and L5. Surface skip-layer vias drop di- rectly into each waveguide layer, preserving quasi-TEM behavior, cutting transitions, and driving loss down. GND via fences are used to close the cavity. This is the architecture Intel and Synopsys are converging toward. Figure 5 illustrates numerous differential pair ground- ed coplanar waveguides routed internally on the strip- line layers. Via fences shield the pairs as they traverse the board to the RF connectors. Skip-layer routing is not a fad, but a necessary evo- lution of PCB interconnects as we push toward 224G and beyond. It brings packaging-level electromagnetic engineering into the PCB domain, giving designers a practical way to maintain quasi-TEM propagation, sup- press higher-order modes, and control crosstalk at fre- quencies where traditional stripline fails. As data rates double, the PCB will increasingly resemble a micro- wave structure, and skip-layer routing is one of the first signs of that future. Figure 3: 112G short-reach hybrid stackup. (Source: iCD Stackup Planner) B E YO N D D ES I G N