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88 I-CONNECT007 MAGAZINE I JUNE 2026 voltage levels to represent logic 0 and logic 1 and is limited to 28 Gbs per lane. PAM4 uses four voltage levels to represent the 2-bit logic combi- nations 11, 10, 01, and 00 (Figure 1). A 224G PAM4 lane requires approximately 56 GHz of usable chan- nel bandwidth. To survive at these speeds, routing must evolve from controlled impedance traces into engineered electromagnetic structures. One of the most prom- ising of these structures is skip layer routing, a dif- ferential waveguide geometry originally developed for IC substrates now emerging as a practical solu- tion for ultra high speed PCB channels. It involves a type of substrate-integrated waveguide structure for differential pairs. A differential stripline pair is essentially routed between two reference planes and surrounded with a fence of ground vias. This creates a differential coaxial-like waveguide within the substrate, commonly used to carry high-speed signals down to the BGA ball-out. The limitation is bandwidth; PAM4 requires 56 GHz. At these frequencies: • Traditional stripline excites higher-order modes • Vias behave like resonant cavities • Plane cavities radiate • Crosstalk becomes unavoidable • Copper roughness dominates loss • Dielectric loss is no longer the limiting factor The channel must keep the signal in the quasi- TEM mode. That is the clean, single-mode behavior where the fields stay tightly contained between the trace and its reference planes. Once a higher-order mode is triggered and the fields disperse, the fields spill into lossy paths, the waveform distorts, and the eye collapses. This is where skip-layer routing comes into play. It is a coaxial-like waveguide formed by a dif- ferential pair sandwiched between two reference planes and surrounded by a via fence. This creates a rectangular cavity that behaves like a differential waveguide (Figure 2). The waveguide geometry pushes the first higher-order mode far above the operating frequency. The cutoff is determined by the cavity width, height, via spacing, and trace separation. The via pitch must be ≤ λ/8 (0.37 mm) at the highest fre- quency. If the cutoff is above 56 GHz, the channel remains clean with reduced EMI, minimal differen- tial to common-mode conversion, and low lane-to- lane crosstalk. Also, at 56 GHz for 112G PAM4 and 112 GHz for 224G PAM4, conductor loss becomes the dominant impairment in the channel. Rough copper dramati- cally increases skin-effect loss, introduces phase-de- lay variation, and drives additional mode conversion, all of which collapse PAM4 eye height. Using hyper- very-low-profile (HVLP) copper mitigates these ef- fects, reducing conductor loss by roughly 1–2 dB per inch at 56 GHz compared to standard copper, a sub- stantial improvement at these frequencies. Skip-layer routing uses blind skip-vias to jump directly to the appropriate stripline layer, eliminat- ing unnecessary layer transitions, via stubs, antipad discontinuities, and reference plane changes. Skip- layer routing aligns perfectly with the emerging Figure 1: NRZ eye vs. PAM4 eye. (Source: Xilinx) Figure 2: Skip-layer 224G differential waveguide structure. B E YO N D D ES I G N