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MAY 2024 I SMT007 MAGAZINE 41 To be very specific, we looked at a few dif- ferent ways in which AI systems could benefit from chiplet architectures. One example is in the high-performance AI space—one that IBM is going aer for its traditional enterprise com- puting customers. How can we get more com- pute power and memory into a smaller volume through chiplet architectures? Another exam- ple is in the edge space to see whether we could use these types of chiplet architectures to real- ize new applications. What kinds of new applications are you anticipating? In my presentation, I gave an example of an application in the millimeter wave space that leverages the AI chiplets we are develop- ing, combined with other potential chiplets. is approach could be used to fully realize the promise of millimeter wave systems for commercial and DoD communications and sensing applications. e automotive space is also ripe for using chiplets to create modular systems, and that could really benefit from the addition of AI acceleration chiplets. Semiconductors have embraced Industry 4.0 for some time now, and PCBA houses seem to be following the lead of semiconductors in embracing this technology. Will this sort of capability advance their ability to implement a meaningful factory of the future on their manufacturing floor? Fabrication processes have become so com- plex that having a lot more metrology capabil- ity at each step in the factory would be a very high value-add. AI adds a powerful tool for real-time monitoring of defects on the factory floor. Likewise for assembly, of course. One of the changes underway, thanks to advanced packaging, is that the physical packaging industry is rapidly changing to handle the growing amount of IO and compute power that's involved there. One example is that passive components are driving down sizes into the very small realm, while, simulta- neously, active computing components in advanced packages are migrating toward 10,000-plus ball grids and more on a package that measures 100 millimeters on a side. Meanwhile, the assembly houses have to handle both of those trends with 100% accuracy. What's in the future for the larger packages? Packages will get larger when we look at these types of chiplet architectures because, from a design point of view, it is very fruitful if we can put more chiplets into a single package. Nat- urally, that significantly affects many of these constraints, particularly those tied to mechani- cal and warpage issues, and certainly that must be accounted for. Regarding actives and passives, it is becom- ing more helpful to integrate passives closer to the active elements for voltage regulation closer to the point-of-load. Second, the merg- ing of components at the package and board levels is reducing the number of layers in the hierarchy. Arvind Kumar