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MAY 2026 I I-CONNECT007 MAGAZINE 89 Figure 4: HFSS simulation of return paths. (Source: Ansys) in turn increases the inductance of the current loop, affecting the signal integrity. This return current also excites the paral- lel plate mode of the planes, causing significant EMI. If the reference planes are at the same DC potential, then they can be connected by stitching vias near the signal via transition to provide shorter paths for return currents. However, if the planes are at different DC potentials, then decoupling capacitors must be connected across the planes at these points to create a path. In addition, some of the return current flows through the interplane capacitance to close the loop. Unfortunately, discontinuities can never be to- tally eliminated, but we can take steps to minimize their effects significantly. It is all about inductance! If the return path loop area is increased in any way, then the inductance will also increase. When re- turn currents are disrupted, the energy they shed doesn't disappear; it often couples into the planes themselves. Plane pairs in multilayer PCBs are essentially unterminated transmission lines, just not the usual traces or cables we may be accustomed to. They also provide a very low impedance path, which means they can present logic devices with a stable reference voltage at high frequencies. But as with signal traces, if the transmission line is mismatched or unterminated, there will be standing waves (ringing). The bigger the mismatch, the larger the standing waves, and the more the impedance will be location-dependent. When the cavity has open-end boundary con- ditions, resonances arise when a multiple of half-wavelengths can fit between the ends of the cavity. When the clock or data harmonics overlap with the cavity resonant frequencies, there is the potential for long-range coupling between any signals that run through the cavity, thus affecting signal integrity as a consequence of inadequate power integrity. High-speed signals behave like RF, turning the PCB into a distributed electromagnetic system. Rise time is the real driver of signal behavior, as every trace becomes a transmission line with its own characteristic impedance and propagation behavior. Variations in impedance, crosstalk, and disrupted return paths distort signals and can excite resonances in the power-ground cavity, making stable impedance, proper termination, and continuous return paths essential for reliable performance. With all these interactions, SI is not a set of isolated problems. It's a system of controlling electromagnetic energy. I-CONNECT007 Resources • Beyond Design by Barry Olney: Interconnect Impedance, Controlled Impedance Design, The Fundamental Rules of High-Speed PCB Design Part 2, Reflecting on Reflections, Re- turn Path Optimization. Barry Olney is managing director of In-Circuit Design Pty Ltd (iCD), Australia, a PCB design service bureau that specializes in board-level simulation. The company developed the iCD Design Integrity software incorporating the iCD Stackup, PDN, and CPW Planner. The software can be downloaded at www.icd.com.au. To read past columns, click here. B E YO N D D ES I G N