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30 PCB007 MAGAZINE I SEPTEMBER 2024 with fillers to reduce the coefficient of ther- mal expansion to ≤50 ppm/K, or prepregs made of glass cloth impregnated with epoxy resin to ensure rigidity. In addition, some PCB processes have combined the redistribution layer (RDL) formation method used in the semiconductor back-end process with the PCB process to achieve sub-10 µm conductor width/spacing. Manufacturing Processes In the manufacturing of copper-clad lami- nates, prepregs, and bond plies, the need for tighter dielectric thickness control in very thin layers will continue to be a challenge for controlling to precise impedance targets and loss budgets. As circuit density increases and feature distances shrink, the importance of dimensional stability and predictability of the substrate materials in order to meet multilayer circuit registration requirements increases. e interaction of substrate material proper- ties with circuit manufacturing processes also presents challenges: • Relative to high-speed performance, inner layer copper surface preparation prior to multilayer pressing is a critical pro- cess. Oxide alternative processes that min- imize surface roughness while providing reliable bonding to high-speed prepregs and films are needed. • e behavior of the dielectric material in mechanical and laser drilling, and in the Table 7: Issue: Reliabiliity